三星uboot1.1.6源码分析——start.s（2）--从NAND复制uboot源码到RAM（1）
三星uboot1.1.6源码分析——start.s（1）的链接地址
接着上一篇分析。
*************************************************************************
_TEXT_BASE:
.word TEXT_BASE
这个会在board\samsung\smdk6410\config.mk文件中给出。如下所示：
ifndef TEXT_BASE
TEXT_BASE = 0xc7e00000
endif
--------------------------------------------------------------------------
/*
* Below variable is very important because we use MMU in U-Boot.
* Without it, we cannot run code correctly before MMU is ON.
* by scsuh.
*/
_TEXT_PHY_BASE:
.word CFG_PHY_UBOOT_BASE
这个在第一篇中有说：
所以上面的CFG_PHY_UBOOT_BASE为0x57e00000
CFG_UBOOT_BASE为0xc7e00000
--------------------------------------
.globl _armboot_start这些在链接脚本中有定义，如下所示：
. = ALIGN(4);
__bss_start = .;
.bss : { *(.bss) }
_end = .;
}
----------------------------------------------------------------
#ifdef CONFIG_USE_IRQ
这个我们上一篇也说过，我们没定义#undef CONFIG_USE_IRQ/* we don't need IRQ/FIQ stuff */
/* IRQ stack memory (calculated at run-time) */
.globl IRQ_STACK_START
IRQ_STACK_START:
.word 0x0badc0de
/* IRQ stack memory (calculated at run-time) */
.globl FIQ_STACK_START
FIQ_STACK_START:
.word 0x0badc0de
#endif
----------------------------------------------------------------------
/*
* the actual reset code
*/
reset:
/*
* set the cpu to SVC32 mode
*/
mrs r0,cpsr
bic r0,r0,#0x1f
orr r0,r0,#0xd3
msr cpsr,r0
*************************************************************************
/*
*************************************************************************
*
* CPU_init_critical registers
*
* setup important registers
* setup memory timing
*
*************************************************************************
*/
/*
* we do sys-critical inits only at reboot,
* not when booting from ram!
*/
cpu_init_crit:
/*
* flush v4 I/D caches
*/
mov r0, #0
mcr p15, 0, r0, c7, c7, 0/* flush v3/v4 cache */
mcr p15, 0, r0, c8, c7, 0/* flush v4 TLB */
/*
* disable MMU stuff and caches
*/
mrc p15, 0, r0, c1, c0, 0
bic r0, r0, #0x00002300@ clear bits 13, 9:8 (--V- --RS)
bic r0, r0, #0x00000087@ clear bits 7, 2:0 (B--- -CAM)
orr r0, r0, #0x00000002@ set bit 2 (A) Align
orr r0, r0, #0x00001000@ set bit 12 (I) I-Cache
mcr p15, 0, r0, c1, c0, 0
上面这些就不说了，很多文章都有说。
------------------------------------------------------------------------
/* Peri port setup */
ldr r0, =0x70000000
orr r0, r0, #0x13
mcr p15,0,r0,c15,c2,4 @ 256M(0x70000000-0x7fffffff)
这个以前说过，我有一篇博客专门讲的是这个。
-------------------------------------------------------------------------
/*
* Go setup Memory and board specific bits prior to relocation.
*/
bl lowlevel_init/* go setup pll,mux,memory */
这一部分，我在另外几篇博客中对这个文件进行了详细的说明，这里就不说了。
-------------------------------------------
/* when we already run in ram, we don't need to relocate U-Boot.
* and actually, memory controller must be configured before U-Boot
* is running in ram. 判断U-boot现在运行的地方，是ram吗？判断的方法就是把当前PC的地址和_TEXT_BASE的值做些处理之后，进行比较，是否相同。
*/
ldr r0, =0xff000fff
bic r1, pc, r0/* r0 <- current base addr of code */
ldr r2, _TEXT_BASE/* r1 <- original base addr in ram */
bic r2, r2, r0/* r0 <- current base addr of code */
cmp r1, r2 /* compare r0, r1 */
beq after_copy/* r0 == r1 then skip flash copy */
---------------------------------------------
#ifdef CONFIG_BOOT_NAND
mov r0, #0x1000
bl copy_from_nand
#endif
其中copy_from_nand的源码如下所示：
/*
* copy U-Boot to SDRAM and jump to ram (from NAND or OneNAND)
* r0: size to be compared
* Load 1'st 2blocks to RAM because U-boot's size is larger than 1block(128k) size
*/
.globl copy_from_nand
copy_from_nand:
mov r10, lr/*save return address*/
mov r9, r0
/* get ready to call C functions */
ldr sp, _TEXT_PHY_BASE/* setup temp stack pointer */
其中有如下定义：
_TEXT_PHY_BASE:
.word CFG_PHY_UBOOT_BASE
sub sp, sp, #12
mov fp, #0/* no previous frame, so fp=0 */ 这里不太懂fp是什么
mov r9, #0x1000
bl copy_uboot_to_ram
copy_uboot_to_ram是个c语言写的函数，在Nand_cp.c (cpu\s3c64xx)文件中，源码如下所示：
-------------------------------------------------------
copy_uboot_to_ram的源码：
int copy_uboot_to_ram (void)
{
int large_block = 0;
int i;
vu_char id;
NAND_ENABLE_CE(); 使能NAND
----------------------------------------------------
其中有：
#define NAND_ENABLE_CE()(NFCONT_REG &= ~(1 << 1))
#define NFCONT_REG __REG(ELFIN_NAND_BASE+NFCONT_OFFSET)
#define __REG(x) (*(vu_long *)(x))
#define ELFIN_NAND_BASE0x70200000
#define NFCONT_OFFSET 0x04
----------------------------------------------------
NFCMD_REG = NAND_CMD_READID;
NFADDR_REG = 0x00;
-----------------------------------------
其中有：
#define NFCMD_REG __REG(ELFIN_NAND_BASE+NFCMMD_OFFSET)
#define NAND_CMD_READID0x90
90 ID : Access command = 90H（NAND手册）
------------------------------------
#define NFADDR_REG __REG(ELFIN_NAND_BASE+NFADDR_OFFSET)
----------------------------------------------------------
/* wait for a while */
for (i=0; i<200; i++);
-------------------------------------------------------
id = NFDATA8_REG;
id = NFDATA8_REG;
-------------------------------------------------------
其中有：
#define NFDATA8_REG __REGb(ELFIN_NAND_BASE+NFDATA_OFFSET)
-------------------------------------------------------
if (id > 0x80)
large_block = 1;
if(id == 0xd5)
large_block = 2; 对读出了ID进行判断，得出page(页)大小
-------------------------------------------------------
/* read NAND Block.
* 128KB ->240KB because of U-Boot size increase. by scsuh
* So, read 0x3c000 bytes not 0x20000(128KB).
*/
return nandll_read_blocks(CFG_PHY_UBOOT_BASE, 0x3c000, large_block);
}
上面这个函数的内容，下篇博客在说。
--------------------------------------------
3: tst r0, #0x0
bne copy_failed
ldr r0, =0x0c000000
ldr r1, _TEXT_PHY_BASE
1: ldr r3, [r0], #4
ldr r4, [r1], #4
teq r3, r4
bne compare_failed/* not matched */
subs r9, r9, #4
bne 1b
4: mov lr, r10 /* all is OK */
mov pc, lr
copy_failed:
nop /* copy from nand failed */
b copy_failed
compare_failed:
nop /* compare failed */
b compare_failed
