2008年下半年软件考试因故推迟了，这未尝不是一件好事，对于那些准备还不够充分的考生来说，现在正是查漏补缺的好时机，本站为您整理了考前练习题，希望对您有所帮助，祝您考出好成绩！
1.从供选择的答案中，选出应填入下面英语语文句中{ }内的正确答案，把编号写在答卷的对应栏内。
One of the guidelines in writing the C code for a software tool is as follows: write code that is as clear and as simple as { A }. The C language can be difficult to read if you combine all { B }features in a single statement. Break complicated { C }into several easy to understand statements for the { D }of readability. This style helps to make your programs more { E } and error-free.
供选择的答案
A～E：①readable ②reusable ③Possible ④semantic
⑤syntactic ⑥constructions ⑦safe ⑧impossible
⑨sake ⑩structure
【解析】
参考译文：为软件工具写C程序源码的一个规则如下：写的程序尽可能清晰、简单。如果你把所有句法特征组合在单个语句中，C语言将会很难读。为了提高可读性应打破复杂结构，将其分为几个易于理解的语句。这种风格有助于使你的程序更加可读，而且不出错误。
【答案】A：③ B：⑤ C：⑥ D：⑨ E：① 3COME文档编辑
2.从供选择的答案中，选出应填入下列英语文句中{ }内的正确答案，把编号写在答卷的对应栏内。
In recent years, one of the more poplar topics panel discussions at computer conferences and trade { A } has been the"RISC versus CISC"debate.
RISC processors feature a small number of instructions that each executes in { B } machine cycle. CISC processors use complex instructions that can take several cycles to execute.
The RISC Versus CISC debate won't be decided by panel discussion 1 it will be won in the marketplace. And the deciding factor may have little to do with { C } of instructions and registers) and more to do with parallelism.
Since their conception, RISC processors have been evolving toward microparallelism, in corporating parallel-processing features { D } the processor. RISC processors feature pipelining, whereby many instructions can be decoded while one instruction executes.
RISC processor, however, are moving to toward pipelines for each unit of the processor.
CISC processors also employ pipelining. They have many interger instructions that execute in one cycle, but the varying execution times of CISC instructions { E } the effectiveness of parallelis.
供选择的答案
A～E：①union ②two ③numbers ④between ⑤limit
⑥contents ⑦shows ⑧one ⑨within ⑩enhance
【解析】
参考译文：近年来，在计算机学术会议和贸易展览会上最流行的会场讨论课题之一是"RISC对CISC"的争论。
RISC处理器以少量指令为特征，且每条指令在一个机器周期中执行。CISC处理器使用复杂的指令，它们可能花费若干周期来执行。
RISC对CISC的争议将不由会场讨论来作结论，它将在市场中定胜负。并且，决定的因素也许很少取决于指令和寄存器的数目，而更多取决于并行性。
自从RISC概念提出后，RISC处理器正向着微并行性发展，它在处理器内部结合了并行处理的特性。RISC处理器以流水线为特点，在流水线上当一条指令执行时，许多指令能被解码。况且，RISC处理器正向着每个处理器单元多流水线发展。
CISC处理器也使用流水线。它们有许多在一个周期中执行的整数指令，但是CISC指令变化的执行时间限制了并行性的效率。
【答案】A：⑦ B：⑧ C：③ D：⑨ E：⑤
3COME考试频道为您精心整理，希望对您有所帮助，更多信息在http://www.reader8.com/exam/
