AD7705校准和读Data register问题
下面是我的程序,希望大侠帮我分析一下。
AD7705_Start()执行的是写Clock reg和Setup reg,进行自动校准模式。
我曾经把AD7705_Start里面的 “写Setup reg,进行自动校准模式”程序注释掉,只写Clock reg,写入和读出都正确。
肯定是校准或读Data register出了问题。
另而且执行完程序段2或3后,DRDY引脚一直保持高,我用示波器测了,不解。
希望有人指点!
==============================================================
主程序段1
reset_AD7705(); read_ad7705(); read_ad7705();
reset_AD7705(); read_ad7705(); AD7705_Start(); read_ad7705();
reset_AD7705(); read_ad7705(); AD7705_Start(); read_ad7705(); reset_AD7705(); read_ad7705();
#define NUM_SAMPLES 1 //每次采样次数void reset_AD7705(void) { unsigned char i; AD7705_DIN = 1;; for( i=0; i<36; i++ ) { AD7705_CLK = 0; _nop_(); _nop_(); _nop_(); AD7705_CLK = 1; _nop_(); _nop_(); _nop_(); } delay_ms(1); }void AD7705_Start(void){ char i,j; unsigned int new = 0; unsigned int get_value[NUM_SAMPLES] = {0}; AD7705_Write_1_BYTE(0x20); // Active Channel Ain1(+)/Ain1(-),Next Opraton Write to CLK REG. for(i=0;i<=10;i++) {_nop_();} AD7705_Write_1_BYTE(0x04); // Master Clk Enable, 2.4576 MHz Clk , O/P Update rate 50Hz (20 mSec). for(i=0;i<=10;i++) {_nop_();} for (i = 0; i < NUM_SAMPLES; i++) { AD7705_Write_1_BYTE(0x10); // Active Channel Ain1(+)/Ain(-),Next Opraton Write to SETUP REG for(j=0;j<=10;j++) // Clearing FSYNC bit Starts sampling. {_nop_();} AD7705_Write_1_BYTE(0x44); // Gain = 1, Bipolar Mode, Buffer Off, Clear FSYNC, Perform Self for(j=0;j<=10;j++) {_nop_();} while(AD7705_DRDY); AD7705_Write_1_BYTE(0x38); get_value[i] = AD7705_Read_2_BYTE(); SendTwoByte(get_value[i]); }}void read_ad7705(void){ unsigned char c; unsigned int i; SendTwoByte(0); AD7705_Write_1_BYTE(0x08); // read Communication register for(i=0;i<=10;i++) {_nop_();} c = AD7705_Read_1_BYTE(); SendOneByte(c); AD7705_Write_1_BYTE(0x18); // read Setup register for(i=0;i<=10;i++) {_nop_();} c = AD7705_Read_1_BYTE(); SendOneByte(c); AD7705_Write_1_BYTE(0x28); // read Clock register for(i=0;i<=10;i++) {_nop_();} c = AD7705_Read_1_BYTE(); SendOneByte(c);//只有在有数据时(DRDR变低),才可以读(Data, Offset, Gain reg)。}